1. Field of the Invention
The present invention relates to a trench capacitor, and more particularly, to a trench capacitor of a DRAM device having an increased capacitor surface area and a process of manufacture thereof.
2. Description of the Prior Art
s the size of a memory cell shrinks, the chip area available for a single memory cell becomes very small. This causes reduction in capacitor area and therefore becomes a challenge for chip manufacturers to maintain adequate cell capacitance of each memory cell fabricated on a high-density memory chip.
Trench-capacitor DRAM devices are known in the art. A trench-storage capacitor typically consists of a very-high-aspect-ratio contact-style hole pattern etched into the substrate, a thin storage-node dielectric insulator, a doped low-pressure chemical vapor deposition (LPCVD) polysilicon fill, and buried-plate diffusion in the substrate. The doped LPCVD silicon fill and the buried plate serve as the electrodes of the capacitor. A dielectric isolation collar in the upper region of the trench prevents leakage of the signal charge from the storage-node diffusion to the buried-plate diffusion of the capacitor.
One approach currently being investigated is to use capacitor dielectric materials having relatively higher dielectric constants such as aluminum oxide (Al2O3) and so on. Other approaches seek to enhance the total surface area of the capacitor structure by modifying the geometrical layout of the storage cell. For example, U.S. Pat. No. 6,271,079 filed May 19, 1999 to Wei et al. discloses a method of forming a bottle-shaped trench capacitor with a sacrificial silicon nitride U.S. Pat. No. 6,319,787 filed Jun. 30, 1998 to Enders et al. discloses a trench capacitor having a substrate with a trench extending therein with a nested, e.g., concentric, conductive regions disposed within the trench.
U.S. Pat. No. 6,440,813 filed Jan. 23, 2001 to Collins et al. discloses a trench capacitor having an increased surface area. The trench capacitor is a dual trench capacitor having a first trench and a second trench wherein inner walls of the trenches electrically connect.
U.S. Pat. No. 6,448,131 filed Aug. 14, 2001 to Cabral, et al. discloses a method for increasing the trench capacitor surface area. The method utilizes a metal silicide to roughen the trench walls. The capacitance is increased due to the increase in the trench surface area after the silicide has been removed.